OTA-C oscillator with low frequency variations for on-chip clock generation in serial LVDS-AER links

This paper presents the design and simulation of an OTA-C oscillator intended to be used as on-chip frequency reference. This reference will be part of the high speed clock generation circuit for Manchester serial LVDS-AER links. A Manchester LVDS receiver can adapt its operation in a limited range of frequencies, so the most important specification is the frequency stability over temperature and process variations. A novel design methodology is presented to design two oscillators in a 90 nm technology using transistors with 2.5 V supply voltage. Intensive simulations with temperature, process, supply voltage variations and mismatch effects were performed in order to analyze the validity of this approach, obtaining Delta ap 7%.