An on-chip-trainable Gaussian-kernel analog support vector machine

We propose an analog circuit architecture of the Gaussian-kernel support vector machine having on-chip training capability. Thanks to the hardware-friendly algorithm, the learning function is realized by attaching a small additional circuitry to the SVM classifying hardware. Though the system works as analog circuits, the input and output signals including training results are all available in digital format. Therefore, the learned parameters are easily stored and reused after training sessions. The Gaussian kernel is realized by a new type of circuits utilizing Gilbert multipliers. The proof-of-concept chip was designed and sent to fabrication. Its successful operation was confirmed by transistor level SPICE simulation.