DocumentCode
2263965
Title
Checker no-harm alarm robustness
Author
Rossi, Daniele ; Omana, Martin ; Metra, Cecilia ; Pagni, Andrea
Author_Institution
D.E.I.S., Bologna Univ.
fYear
0
fDate
0-0 0
Lastpage
280
Abstract
In this paper we evaluate the probability that a transient fault (TF), multiple or single, affecting a checker of a self-checking circuit, gives rise to an unnecessary error indication (no-harm alarm). A new property (no-harm alarm robustness) has been defined that, in case of a fault affecting a self-checking circuit (SCC), guarantees that we can determine whether the fault is affecting the functional block, or the checker itself, and whether such a fault is a transient or a permanent fault. Finally, we propose a possible solution implementing the defined property. Its behavior has been verified by means of HSpice simulations, and we evaluate its cost in terms of area overhead and introduced delay
Keywords
SPICE; built-in self test; error statistics; fault simulation; integrated circuit testing; HSpice simulations; SCC; TF; area overhead; checker; fault effect; functional block; no-harm alarm robustness; permanent fault; probability evaluation; self-checking circuit; transient fault; unnecessary error indication; Automatic testing; Circuit faults; Circuit simulation; Circuit testing; Costs; Delay; Error correction; Microelectronics; Robustness; Sea level;
fLanguage
English
Publisher
ieee
Conference_Titel
On-Line Testing Symposium, 2006. IOLTS 2006. 12th IEEE International
Conference_Location
Lake Como
Print_ISBN
0-7695-2620-9
Type
conf
DOI
10.1109/IOLTS.2006.16
Filename
1655561
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