• DocumentCode
    2264004
  • Title

    Low-power CMOS design through V/sub TH/ control and low-swing circuits

  • Author

    Sakurai, Takayasu ; Kawaguchi, Hiroshi ; Kuroda, Tadahiro

  • Author_Institution
    Inst. of Ind. Sci., Tokyo Univ., Japan
  • fYear
    1997
  • fDate
    18-20 Aug. 1997
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    This paper describes some of the circuit level techniques for low-power CMOS designs. V/sub TH/ control circuits are necessary for achieving low-threshold voltage in high-speed low-voltage applications. As for the low swing circuit techniques, applications to a clock system, logic part, and I/O´s are discussed.
  • Keywords
    CMOS digital integrated circuits; CMOS logic circuits; integrated circuit design; logic design; timing circuits; circuit level techniques; clock system; high-speed LV applications; low-power CMOS design; low-swing circuits; low-threshold voltage; threshold voltage control; CMOS logic circuits; Clocks; Delay estimation; Energy consumption; Flip-flops; Iron; Logic circuits; Logic design; Switches; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Low Power Electronics and Design, 1997. Proceedings., 1997 International Symposium on
  • Conference_Location
    Monterey, CA, USA
  • Print_ISBN
    0-89791-903-3
  • Type

    conf

  • Filename
    621198
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2264004