DocumentCode
2264221
Title
Survey of low power techniques for ROMs
Author
De Angel, Edwin ; Swartzlander, Earl E., Jr.
Author_Institution
Crystal Semicond. Corp., Austin, TX, USA
fYear
1997
fDate
18-20 Aug. 1997
Firstpage
7
Lastpage
11
Abstract
This paper presents a survey of low power techniques for Read Only Memories (ROMs). Significant savings in power dissipation are achieved through the use of techniques at the circuit and architecture level. The ROM circuits have been designed in O.35 /spl mu/m CMOS technology and simulated using PowerMill.
Keywords
CMOS memory circuits; integrated circuit design; read-only storage; 0.35 micron; PowerMill simulation; ROM circuits; low power techniques; power dissipation; read only memories; submicron CMOS technology; Capacitance; Decoding; Encoding; Logic; Multiplexing; Power generation; Read only memory; SRAM chips; Signal generators; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Low Power Electronics and Design, 1997. Proceedings., 1997 International Symposium on
Conference_Location
Monterey, CA, USA
Print_ISBN
0-89791-903-3
Type
conf
Filename
621199
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