DocumentCode
2264398
Title
Optimal area and impedance allocation for dual - string DACs
Author
Duong, Thu T. ; Chen, Degang ; Geiger, Randall L.
Author_Institution
Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA
fYear
2009
fDate
24-27 May 2009
Firstpage
2741
Lastpage
2744
Abstract
The relationship between yield, area, and impedance distribution in dual-string DACs is developed. Optimal area allocation and impedance distributions strategies for maximizing yield in the presence of local random process variations are introduced. Simulation results show that a factor of 4 or more reduction in area for a given yield is possible if typical area/impedance allocations are replaced with an optimal area/impedance allocation.
Keywords
digital-analogue conversion; random processes; resistors; dual string DAC; dual-ladder resistor string digital analog converter; impedance distribution strategy; local random process variation; optimal area-impedance allocation; Analysis of variance; Circuits; Computational modeling; Distributed computing; Distribution strategy; Immune system; Impedance; Linearity; Random processes; Resistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on
Conference_Location
Taipei
Print_ISBN
978-1-4244-3827-3
Electronic_ISBN
978-1-4244-3828-0
Type
conf
DOI
10.1109/ISCAS.2009.5118369
Filename
5118369
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