DocumentCode :
226455
Title :
Programmable PWM modulator optimized for high speed for OPWM test platform
Author :
Kubak, Jan ; Stastny, Jakub ; Kujan, Petr
Author_Institution :
Dept. of Cirucit Theor., Czech Tech. Univ. (CTU) in Prague, Prague, Czech Republic
fYear :
2014
fDate :
9-10 Sept. 2014
Firstpage :
157
Lastpage :
160
Abstract :
Optimal Pulse Width Modulation (OPWM) is an established technique to generate PWM waveforms with low base-band distortion. The technique requires fast PWM generator to minimize base-band distortion. The aim of this paper is to present a programmable PWM modulator optimized for high speed satisfying the OPWM technique demands. The PWM modulator stores pulse sequence data in an internal memory which is facilitated by SDRAM memory. The design was implemented on Register Transfer Level (RTL) using VHDL language. The design verification was conducted on both RTL and gate levels as well as tested on two development boards.
Keywords :
DRAM chips; SRAM chips; distortion; modulators; pulse width modulation; OPWM test platform; PWM waveforms; RTL; SDRAM memory; VHDL language; design verification; fast PWM generator; gate levels; internal memory; low base-band distortion; optimal pulse width modulation; programmable PWM modulator; pulse sequence data; register transfer level; Clocks; Field programmable gate arrays; Harmonic analysis; Niobium; Pulse width modulation; SDRAM; FPGA; Programmable PWM; optimal PWM; selective harmonic elimination SHE;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Applied Electronics (AE), 2014 International Conference on
Conference_Location :
Pilsen
ISSN :
1803-7232
Print_ISBN :
978-8-0261-0276-2
Type :
conf
DOI :
10.1109/AE.2014.7011690
Filename :
7011690
Link To Document :
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