Title :
A Verilog-based computer engineering course and laboratory
Author :
Jackson, David Jeff ; Mcghee, David W.
Author_Institution :
Dept. of Electr. Eng., Alabama Univ., Tuscaloosa, AL, USA
Abstract :
This paper presents a summary of design experiences with the Verilog HDL for a senior class and laboratory in computer engineering. Specifically, a set of laboratory exercises are described which introduce students to the HDL design philosophy and prepare the student for a microprocessor design project which completes the course. Additionally, a framework for integrating this course within a traditional digital sequence is given
Keywords :
computer science education; educational courses; hardware description languages; logic CAD; student experiments; HDL design; Verilog HDL; Verilog-based computer engineering course; Verilog-based laboratory; laboratory exercises; microprocessor design project; Circuit testing; Computer aided engineering; Electronic design automation and methodology; Flip-flops; Hardware design languages; Laboratories; Logic design; Logic gates; Logic testing; Process design;
Conference_Titel :
Circuits and Systems, 1993., Proceedings of the 36th Midwest Symposium on
Conference_Location :
Detroit, MI
Print_ISBN :
0-7803-1760-2
DOI :
10.1109/MWSCAS.1993.343199
