Title :
Transition time formulae for buffer circuits
Author :
Vemuru, Srinivasa R ; Scheinberg, Norman ; Smith, Edwyn D.
Author_Institution :
Dept. of Electr. Eng., City Coll. of New York, NY, USA
Abstract :
The effects of input transition time and buffer taper factor on the output transition time were not considered in the prior investigations on CMOS buffer circuits. We present new formulae for the output transition time of fixed taper and variable taper buffer circuits and compare the results with transition times obtained from SPICE-based-simulations
Keywords :
CMOS logic circuits; buffer circuits; delays; CMOS IC; buffer circuits; buffer taper factor; fixed taper; input transition time; output transition time; transition time formulae; variable taper; Analytical models; Circuits; Cities and towns; Delay effects; Educational institutions; Inverters; MOSFETs; Propagation delay; Semiconductor device modeling; Threshold voltage;
Conference_Titel :
Circuits and Systems, 1993., Proceedings of the 36th Midwest Symposium on
Conference_Location :
Detroit, MI
Print_ISBN :
0-7803-1760-2
DOI :
10.1109/MWSCAS.1993.343209
