Digital compensation unit for impedance metrology working up to 2 MHz

This paper describes a design of two-channel digital compensation unit which has been developed for accuracy measurement of four-terminal-pair (4TP) impedance standards by the three-voltmeter method. The FPGA based compensation unit senses a residual voltage on the low potential port of the compared impedances continuously. The sensing process is made by means of a synchronous detection technique; a principle of the lock-in amplifiers is implemented on the FPGA for each channel. Simultaneously a voltage proportional to the residual voltage is injected into a main measuring circuit via an injection transformer. Thanks to this feedback, residual voltages at low potential port of measured impedances are reduced more than 1000 times. A typical level of residual voltages is about 5 μV. The compensation unit can be applied in the frequency range from 10 kHz up to 2 MHz. The boundary of the range are mainly limited by properties of digital phase-locked loop as well as parameters of CIC filters used as low-pass filters on the outputs of digital multipliers. The unit is controlled by a PC via optical insulated USB port.