Accurate transformation-based timing analysis for RC non-tree circuits

Designs with non-tree consideration have been proven to improve the yield and reliability in modern chips. In this paper, an efficient three-phase approach for transformation-based timing analysis is proposed to transform a cyclic graph into an acyclic graph by using the node-splitting operation and compute the delay of the transformed tree-based circuit in an Elmore delay model. Compared with the timing analysis in the Spice tool, the experimental results show that our proposed three-phase approach completes the accurate timing analysis for any tested RC non-tree circuit in less CPU time under a reasonable delay error.