DocumentCode :
2265932
Title :
Separated caches and buses for multiprocessor system
Author :
Chaudhry, Ghulam M. ; Han, Weijing
Author_Institution :
Comput. Eng. Res. Lab., Missouri Univ., Columbia, MO, USA
fYear :
1993
fDate :
16-18 Aug 1993
Firstpage :
1113
Abstract :
The proposed scheme exploits the concept of shared cache and private cache technique. The caches are separated as shared block caches and private block caches instead of using only private caches or shared cache in the multiprocessor system. Shared block caches are working in semi-critical section (a data item can be read by two or more processors but can be written only by one processor at a time). Both shared and private block caches have their own buses. The simulation results obtained are compared with the pure private cache schemes
Keywords :
cache storage; shared memory systems; system buses; buses; multiprocessor system; private block caches; semi-critical section working; shared block caches; Access protocols; Broadcasting; Cache memory; Laboratories; Multiprocessing systems; Proposals;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1993., Proceedings of the 36th Midwest Symposium on
Conference_Location :
Detroit, MI
Print_ISBN :
0-7803-1760-2
Type :
conf
DOI :
10.1109/MWSCAS.1993.343282
Filename :
343282
Link To Document :
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