DocumentCode :
2266216
Title :
Elimination of CMP process in BEOL by using Low-k scan planarization
Author :
Mizuno, Takayuki ; Saito, Kazuyuki
Author_Institution :
Assoc. of Super-Adv. Electron. Technol., Tsukuba, Japan
fYear :
2003
fDate :
30 Sept.-2 Oct. 2003
Firstpage :
392
Lastpage :
395
Abstract :
The improvement of global planarity after the Low-k film formation is indispensable for raise of the yield and reduction of the steps for planarization in dual damascene multilayer interconnection process. We confirmed that scan coating has more excellent uniformity and planarization ability than conventional spin coating.
Keywords :
chemical mechanical polishing; copper; integrated circuit manufacture; metallic thin films; planarisation; BEOL; CMP; Cu; dual damascene multilayer interconnection process; low-k film formation; low-k scan planarization; Area measurement; Coatings; Dielectric measurements; Equations; Fluid flow measurement; Planarization; Position measurement; Q measurement; Shape measurement; Thickness measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Manufacturing, 2003 IEEE International Symposium on
ISSN :
1523-553X
Print_ISBN :
0-7803-7894-6
Type :
conf
DOI :
10.1109/ISSM.2003.1243310
Filename :
1243310
Link To Document :
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