Intelligent sample test using cost based methodologies

In today´s vertically integrated semiconductor companies, the entire manufacturing process impacts the product´s bottom line. Wafer test was designed to eliminate expensive assembly of bad die. Wafer test costs are becoming high so time spent testing is less cost effective. Sample testing is a technique for lowering wafer test costs. Careful tuning can optimize the process. This paper introduces a method for sample candidate selection, test plan creation as well as cost model validation. We specifically discuss an extensible solution developed at Motorola to avoid capital investment in automated test equipment. The result is a permanent increase in test floor throughput with no increase in hardware.