DocumentCode :
2266726
Title :
A detailed analysis of combinational, multiple-line redundant circuits
Author :
Evans, Allison H. ; Macii, Enrico
Author_Institution :
Dept. of Comput. Sci., California Univ., San Diego, La Jolla, CA, USA
fYear :
1993
fDate :
16-18 Aug 1993
Firstpage :
1296
Abstract :
Redundancy in a combinational circuit involving a single line is fairly well understood. However, little is known about multiple-line redundancies for which any proper subset is irredundant. In this paper we provide tools for studying such redundancies. We present examples of multiple redundancies, and we prove that circuits with redundancies of any multiplicity exist
Keywords :
combinational circuits; fault diagnosis; logic testing; redundancy; combinational circuit; fault masking; logic testing; multiple-line redundant circuits; subset irredundancy; Circuit faults; Combinational circuits; Computer science; Costs; Electrical fault detection; Fault detection; Hardware; Logic circuits; Redundancy; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1993., Proceedings of the 36th Midwest Symposium on
Conference_Location :
Detroit, MI
Print_ISBN :
0-7803-1760-2
Type :
conf
DOI :
10.1109/MWSCAS.1993.343338
Filename :
343338
Link To Document :
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