DocumentCode
2266976
Title
A breakdown model for the bipolar transistor to be used with circuit simulators
Author
Keshavarz, Abdol A. ; Raney, Carolyn W. ; Campbell, Dave C.
Author_Institution
Alliance Technol. Inc., Albuquerque, NM, USA
fYear
1993
fDate
16-18 Aug 1993
Firstpage
1340
Abstract
A breakdown model for the output characteristics of the bipolar transistor (bjt) has been developed. The behavioral modeling capability of PSPICE, a popular SPICE program (with Emphasis on Integrated Circuits) was used to implement the macromodel. The model predicts bjt output characteristics under breakdown conditions. Experimental data was obtained to verify the macromodel. Good agreement exits between the measured and the simulated results
Keywords
SPICE; avalanche breakdown; bipolar transistors; circuit analysis computing; semiconductor device models; PSPICE; behavioral modeling capability; bipolar transistor; bjt output characteristics; breakdown model; circuit simulators; macromodel; simulated results; Bipolar transistors; Breakdown voltage; Circuit simulation; Convergence; Electric breakdown; Integrated circuit modeling; Laboratories; Predictive models; Robustness; SPICE;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1993., Proceedings of the 36th Midwest Symposium on
Conference_Location
Detroit, MI
Print_ISBN
0-7803-1760-2
Type
conf
DOI
10.1109/MWSCAS.1993.343351
Filename
343351
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