DocumentCode
2267132
Title
Two-pole analysis of interconnection trees
Author
Kahng, Andrew B. ; Muddu, Sudhakar
Author_Institution
Dept. of Comput. Sci., California Univ., Los Angeles, CA, USA
fYear
1995
fDate
31 Jan-2 Feb 1995
Firstpage
105
Lastpage
110
Abstract
We address the two-pole simulation of interconnect trees via the moment matching technique. We simulate the interconnect network by modeling the distributed lines with non-uniform m lumped segments and using the two-pole methodology. To this end, we derive new non-uniform equivalent circuits which match the general distributed line transfer function up to the second term. Using the recursive equation for the admittance of a tree, we give the exact expressions for the first and second moments of the transfer function of the interconnect tree. Our results show that delay estimates using our method are within 13% of SPICE-computed delays. As routing trees become bigger and interconnection lines become longer, e.g., in MCM design, our approach has advantages in both accuracy and simulation complexity
Keywords
circuit analysis computing; digital simulation; equivalent circuits; integrated circuit interconnections; integrated circuit packaging; multichip modules; network routing; trees (mathematics); MCM layout; delay estimates; distributed line transfer function; distributed lines; interconnection trees; moment matching technique; nonuniform equivalent circuits; recursive equation; routing trees; two-pole analysis; Admittance; Circuit simulation; Computational modeling; Delay estimation; Equations; Equivalent circuits; Integrated circuit interconnections; RLC circuits; Routing; Transfer functions;
fLanguage
English
Publisher
ieee
Conference_Titel
Multi-Chip Module Conference, 1995. MCMC-95, Proceedings., 1995 IEEE
Conference_Location
Santa Cruz, CA
Print_ISBN
0-8186-6970-5
Type
conf
DOI
10.1109/MCMC.1995.512012
Filename
512012
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