DocumentCode
2267161
Title
Comparisons of bus transfer operations using PPS (pulsed power supply) and conventional CMOS in PWB and MCM environments
Author
Gabara, Thad ; Fischer, Bill
Author_Institution
AT&T Bell Labs., Murray Hill, NJ, USA
fYear
1995
fDate
31 Jan-2 Feb 1995
Firstpage
118
Lastpage
122
Abstract
A comparison of I/O power dissipation is compared for an adiabatic technique called PPS CMOS and conventional CMOS. The simulated results evaluated either a PWB or an MCM environment. A 32 bit bus with 8 loads on each bus is the model used for this paper. The results indicate that power and noise reductions are possible using PPS I/O buffers. Furthermore, the MCM is an optimum environment for the adiabatic logic family
Keywords
CMOS logic circuits; circuit noise; integrated circuit packaging; multichip modules; printed circuit design; 32 bit; I/O buffers; I/O power dissipation; MCM environment; PPS CMOS; PWB; adiabatic technique; bus transfer operations; noise reductions; package design; pulsed power supply; CMOS logic circuits; Capacitors; Frequency; Packaging; Power dissipation; Pulse inverters; Pulsed power supplies; Resistors; Variable structure systems; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Multi-Chip Module Conference, 1995. MCMC-95, Proceedings., 1995 IEEE
Conference_Location
Santa Cruz, CA
Print_ISBN
0-8186-6970-5
Type
conf
DOI
10.1109/MCMC.1995.512014
Filename
512014
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