Prospects of multiple-valued associative VLSI processors

This paper presents a design of a high-density multiple-valued content-addressable memory (CAM) and its application to VLSI processors. The basic search operations executed in the multiple-valued CAM are both the threshold operations in each cell and logic-value conversion against a multiple-valued input data. Various multiple-valued operations for data retrieval can be easily performed by programming logic-value conversion. Moreover, the cell circuit consists of two transistors and one capacitance, which are used for not only the storage of multilevel charge, but also for linear sum operation by the capacitive coupling technique. Finally, several approaches for developing application-specific CAM architectures to support real-time artificial inference features in intelligent robot systems are demonstrated