Simulation of variable precision IEEE floating point using C++ and its application in digital signal processor design

We use a C++ class to transparently emulate variable-precision floating point arithmetic using standard arithmetic. This allows the determination of an algorithm´s susceptibility to errors produced by finite-precision arithmetic and the determination of the minimum precision necessary for stability. The class, called Real, offers several advantages for many applications, e.g., ALU design, signal processing, systolic and lattice filter design, etc. Since it supports the IEEE floating point standard, it produces identical results on any compliant platform. An algorithm can be adapted for simulation with minimal effort and without interfering with normal operation. We also consider how the acceptance of the IEEE standard and the development of fast hardware for microcomputers have changed common assumptions about algorithm timing. Finally, we examine the potential use of the new floating point DSP chips for adaptive filtering. Historically, the computational requirements of adaptive filters confined implementations to specialized hardware or supercomputers. Today´s DSP chips offer a relatively inexpensive alternative. We have implemented several adaptive filtering algorithms that are based on Least Squares estimation criterion on Motorola´s DSP96002. Our experience indicates that the DSP96K is a viable medium for such algorithms and one can expect a ten-fold speed improvement over a i486 running at 50 MHz