Technology mapping on a multi-output logic module built around Cellular Automata Array for a new FPGA architecture

Due to the low design turn-around time, low risk, high testability, and field programmability, Field Programmable Gate Arrays are becoming increasingly popular for rapid circuit realization. The logic blocks in currently available FPGAs are mostly single output. This accompanied with their inability to realize XORs efficiently and the absence of good logic synthesis tools for XOR functions, prevents their usage in many real-life XOR dominated applications. In this paper, we propose a new 5-input 3-output AND-XOR based logic block architecture built around Cellular Automata Array (CAA). An efficient multi-level AND-XOR minimizer has been developed. A generic library based technology mapping technique has been evolved. Experimentation with a large number of XOR dominated MCNC benchmarks establishes the superiority of our logic block over those of Xilinx and Actel for these functions. The mapping scheme is a generic one and thus can be used to evaluate any arbitrary multi-output as well as single-output logic block