Synchronization of communicating modules and processes in high level synthesis

In ASIC designs, reuse of already available components is often preferred. Synthesis systems catering to this need must ensure proper synchronization among the communicating modules. This paper proposes an object oriented design framework to support reuse. The steps to be taken for synchronization of communicating hardware entities through a non-blocking channel have been analyzed. The synthesis system ensures synchronization among the communicating modules before scheduling. The scheme has been tested on a few real life image processing examples