DocumentCode
2268490
Title
Novel Efficient Check Node Update Implementations for Row Weight Matched Min-Sum Algorithm
Author
Xin, Lu ; Jun Xu
Author_Institution
Shenzhen Inst. of Inf. Technol., Shenzhen
fYear
2007
fDate
13-15 Aug. 2007
Firstpage
560
Lastpage
563
Abstract
This paper has presented various Min-Sum related LDPC decoding algorithms and their typical hardware architectures of check node update in the scenario of parallel implementation. For one check node update of Normalized Min-Sum algorithm, if the current row weight is dc, dc multiplications are needed. If dc is large, dc multiplications are needed, which leads to high complexity. In this article, one innovative method for check node update has been found, which can obviously reduce the number of comparison/selection operations for the row weight matched Min-Sum algorithm of high rate LDPC codes. Simulations have claimed the performance of row weight matched Min-Sum is nearly the same as that of Log-BP, namely the optimal algorithm, which has shown that row weight matched Min-Sum are good choices for LDPC decoding.
Keywords
decoding; optimisation; parity check codes; LDPC decoding algorithm; check node update implementation; low-density parity-check codes; row weight matched min-sum algorithm; AWGN; Baseband; Concurrent computing; Delay effects; Gaussian channels; Hardware; Information technology; Iterative decoding; Parity check codes; Turbo codes;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer and Computational Sciences, 2007. IMSCCS 2007. Second International Multi-Symposiums on
Conference_Location
Iowa City, IA
Print_ISBN
978-0-7695-3039-0
Type
conf
DOI
10.1109/IMSCCS.2007.30
Filename
4392663
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