DocumentCode
2268787
Title
Application of field plate in SLOP-LDMOS
Author
Wang, Wenlian ; Zhang, Bo ; Zehong Li ; Li, Zhaoji
Author_Institution
State Key Lab. of Electron. Thin Films & Integrated Devices, Univ. of Electron. Sci. & Technol. of China, Chengdu, China
fYear
2010
fDate
28-30 July 2010
Firstpage
507
Lastpage
509
Abstract
This paper investigates the effect of field plate on a new super junction LDMOS-surface low on-resistance path (SLOP) LDMOS. The surface electric field of SLOP-LDMOS focuses at source and drain end because of the RESURF structure under super junction (SJ). Field plate improves electric field distribution of SLOP-LDMOS by improving the charge balance of SJ, which is different from conventional LDMOS. Improving charge balance reduces the peaks of electric field, which increases the breakdown voltage (BV). Numerical simulation results indicate that the BV of SLOP-LDMOS is increased to 300 V from 180 V by employing field plate. The experimental result shows that the SLOP-LDMOS with drift length of 15 μm exhibits a BV of 290 V.
Keywords
CMOS integrated circuits; MOSFET; numerical analysis; SJ charge balance; SLOP-LDMOS electric field distribution; breakdown voltage; drift length; field plate; numerical simulation; super junction LDMOS; surface electric field; surface low on-resistance path; voltage 300 V to 180 V;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications, Circuits and Systems (ICCCAS), 2010 International Conference on
Conference_Location
Chengdu
Print_ISBN
978-1-4244-8224-5
Type
conf
DOI
10.1109/ICCCAS.2010.5581943
Filename
5581943
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