DocumentCode
2269655
Title
Analysis of the computational requirements of a pulse-Doppler radar signal processor
Author
Broich, R. ; Grobler, H.
Author_Institution
DPSS Radar & Electron. Warfare, CSIR, Pretoria, South Africa
fYear
2012
fDate
7-11 May 2012
Abstract
In an attempt to find an optimal processing architecture for radar signal processing applications, the different algorithms that are typically used in a pulse-Doppler radar signal processor are investigated. Radar algorithms are broken down into mathematical operations and the relative processing requirements of each operation is determined. Implementation alternatives for the operations with the highest relative processing requirements are briefly discussed for an FPGA based soft-core architecture.
Keywords
Doppler radar; field programmable gate arrays; radar signal processing; FPGA-based soft-core architecture; mathematical operations; optimal processing architecture; pulse-Doppler radar signal processor; radar algorithm; radar signal processing application; Demodulation; Doppler effect; Finite impulse response filter; Memory management; Radar; Radar signal processing; Signal processing algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
Radar Conference (RADAR), 2012 IEEE
Conference_Location
Atlanta, GA
ISSN
1097-5659
Print_ISBN
978-1-4673-0656-0
Type
conf
DOI
10.1109/RADAR.2012.6212253
Filename
6212253
Link To Document