DocumentCode
2270032
Title
Combined optimization of area and testability during state assignment of PLA-based FSM´s
Author
Mohan, C. Rama ; Chakrabarti, P.P.
Author_Institution
Cadence Design Syst. (India) Pvt Ltd., Noida, India
fYear
1995
fDate
4-7 Jan 1995
Firstpage
408
Lastpage
413
Abstract
Stuck-at and crosspoint faults in PLA´s, introduce combinational and sequential redundancies into PLA-based FSM´s, this affecting the testability of these FSM´s. In this paper, we propose a new state assignment algorithm for PLA-based FSM´s called EARTH, which considers both aspects of area minimization and testability of the resultant PLA´s with the fault model containing single stuck-at and/or single cross-point faults. We have also developed an algorithm that checks for redundancies in a PLA-based FSM. We have found the redundancies in FSM´s that have been state encoded using EARTH with our redundancy detector and areas of these MCNC Benchmark FSM´s. EARTH has yielded 5 times less undetectable faults on these FSMs than NOVA (approx) with areas 2% more than NOVA (approx), on an average
Keywords
circuit layout CAD; circuit optimisation; design for testability; fault diagnosis; finite state machines; integrated circuit layout; integrated circuit testing; logic CAD; logic testing; minimisation of switching nets; programmable logic arrays; redundancy; state assignment; EARTH algorithm; PLA-based FSM; area minimization; combined optimization; fault model; redundancy checker; single cross-point faults; single stuck-at faults; state assignment; testability optimisation; Circuit faults; Circuit testing; Computer science; Earth; Logic testing; Programmable logic arrays; Redundancy; Sequential analysis; Sequential circuits; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 1995., Proceedings of the 8th International Conference on
Conference_Location
New Delhi
ISSN
1063-9667
Print_ISBN
0-8186-6905-5
Type
conf
DOI
10.1109/ICVD.1995.512148
Filename
512148
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