Title :
Quasi-static energy recovery logic and supply-clock generation circuits
Author :
Ye, Yibin ; Roy, Kaushik ; Stamoulis, Goorgios I.
Author_Institution :
Sch of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
Abstract :
A Quasi-Static Energy Recovery Logic family (QSERL) using two complementary sinusoidal supply clocks is proposed in this paper. A high-efficiency clock generation circuitry which generates two complementary sinusoidal clocks required by QSERL is also presented. The clock circuitry locks both frequency and phase of clock signals, which makes it possible to integrate adiabatic module into a VLSI system. We have designed an 8/spl times/8 carry-save multiplier using QSERL logic and two phase sinusoidal clocks. SPICE simulation shows that the QSERL multiplier can save 37% of energy over static CMOS multiplier at 100 MHz.
Keywords :
CMOS logic circuits; SPICE; VLSI; clocks; multiplying circuits; 100 MHz; CMOS carry-save multiplier; SPICE simulation; VLSI; adiabatic module; quasi-static energy recovery logic; supply-clock generation circuit; two phase sinusoidal clock; CMOS logic circuits; Clocks; Diodes; Frequency; Logic circuits; Logic design; Neodymium; Partial discharges; Permission; Very large scale integration;
Conference_Titel :
Low Power Electronics and Design, 1997. Proceedings., 1997 International Symposium on
Conference_Location :
Monterey, CA, USA
Print_ISBN :
0-89791-903-3
