Title :
Intel’s Post Silicon functional validation approach
Author :
Tommy, Bojan ; Igor, Frumkin ; Robert, Mauri
Author_Institution :
Intel Corp., Haifa
Abstract :
CPU Post-Silicon functional validation is the last "guardian" logic-wise before delivering the product to the market. In each CPU generation, the challenges are larger due to increasingly complex architectures, budget constraints and shorter schedules. Success can be achieved just with the novel approaches across different validation teams, and with a complex of state-of-the-art validation software, hardware, execution and silicon debug environments. Budget constraints lead to high automation and efficient validation process. Though Intel Corporation has different divisions, mutual help and hard work and optimization ensures high quality product within the schedule.
Keywords :
formal verification; logic design; logic testing; microprocessor chips; CPU generation; Intel Corporation; complex architecture; corner-case bugs; post silicon functional validation; product quality; silicon debug environment; Computer bugs; Controllability; Debugging; Energy management; Job shop scheduling; Manufacturing; Prototypes; Silicon; Temperature dependence; Time to market;
Conference_Titel :
High Level Design Validation and Test Workshop, 2007. HLVDT 2007. IEEE International
Conference_Location :
Irvine, CA
Print_ISBN :
978-1-4244-1480-2
DOI :
10.1109/HLDVT.2007.4392786