Spaceflight multi-processors with fault tolerance and connectivity tuned from sparse to dense

We describe a novel generation of multi-processor architectures, with fault tolerance and connectivity tuned from sparse to dense. Multivariate feasible regions quantify how such architectures minimize channel cost and latency, and maximize throughput and fault tolerance. Key to designs which optimally exploit these feasible regions: a software-automated catalog of results from the mathematics of connectivity. For example, discoveries about Hamming graphs set the stage for algorithms that configure the corresponding topologies. We introduce a new theorem that explicates the separability-covering duality of Hamming graphs, together with a new, efficient algorithm for recognizing and labeling Hamming graphs of arbitrary radix and dimension. Previously reported algorithms run slower, and emphasize Hamming graphs with radix two. Grid computing applications that benefit from tunable fault tolerance and connectivity include i) design of multi-processors, coupled via vertical cavity surface emitting lasers (VCSELs); ii) auto-configuration of self-healing mobile ad hoc networks (MANETs) via digital radio-frequency channels. This is an in-depth paper targeting engineers, computer scientists, or applied mathematicians with a background in quantitative, dependable computing. We provide a tutorial illustrating how the mathematics of connectivity solves seven practical problems, present seven new theoretical results, and pose nine open challenges. Two complementary works appear in these proceedings: addressing a general audience with an overview of our work, the diagrams and informal narrative of "Multi-Processors by the Numbers" as presented by Laforge and Turner (2006) unfold how feasible regions govern multi-processor design and operation, and elaborate grid computing as mentioned in the abstract above; technologists and engineers may also be interested in "vertical cavity surface emitting lasers for spaceflight multi-processors" (LaForge et al., 2006), our broadly-scoped rep- - ort on VCSELs as enablers for tunable architectures