DocumentCode :
2271864
Title :
Design validation on multiple-core CPU supported low power states using platform based infrared emission microscopy (PIREM) technique
Author :
Chen, Yuan-Chuan Steven ; Budka, Dave ; Gibertini, Auston ; Bockelman, Dan ; Lin, Yutien
Author_Institution :
Intel Corp., Hillsboro, OR, USA
fYear :
2012
fDate :
23-25 April 2012
Firstpage :
1
Lastpage :
4
Abstract :
An innovative post-silicon design validation methodology using recognized industry wide IREM imaging techniques in conjunction with full PC platform enablement was developed, and successfully applied to the IA-32 multiple-core (MC) Nehalem® microprocessor family [1]. Conventional structural based “tester” IREM characterization and debug techniques can, for the first time, be extended to the “platform” environment. IREM images can now be examined for design validations by running Windows/Linux® operating systems (OS) with market available benchmark software applications. This approach has been proven to be a faster, and significantly more cost effective, approach for post silicon design validation, power debug on low power Energy Star® states, and realistic customer applications.
Keywords :
infrared imaging; microcomputers; silicon; IA-32 multiple-core; IREM characterization; IREM imaging techniques; Nehalem®; Windows/Linux® operating systems; customer applications; debug techniques; microprocessor family; multiple-core CPU supported low power states; platform based infrared emission microscopy; post-silicon design validation methodology; Microprocessors; Phase locked loops; Rails; Silicon; Thermal management; Thermal sensors; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, Automation, and Test (VLSI-DAT), 2012 International Symposium on
Conference_Location :
Hsinchu
ISSN :
PENDING
Print_ISBN :
978-1-4577-2080-2
Type :
conf
DOI :
10.1109/VLSI-DAT.2012.6212615
Filename :
6212615
Link To Document :
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