DocumentCode :
2272021
Title :
A fuzzy-neuro approach for timing-driven system partitioning in VLSI multi-chip design
Author :
Chang, Ray-I ; Hsiao, Pei-Yung
Author_Institution :
Dept. of Comput. & Inf. Sci., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fYear :
1994
fDate :
26-29 Jun 1994
Firstpage :
302
Abstract :
A contemporary definition of the VLSI system partitioning problem is characterized by multiple contradictory objectives to minimize connection wires while satisfying timing and capacity constraints. Although a number of algorithms have been proposed in recent years, they are unable to efficiently exploit massively parallel architecture. Moreover, the utilization of expert knowledge does not explicitly address the problem of multiple contradictory objectives. In this paper, a fuzzy-neuro approach which models expert knowledge as fuzzy logic rules is proposed to govern the multi-objective optimization process of neural networks. Real circuits are presented to verify the performance and feasibility of the proposed method. Comparisons are made with the Hopfield-type network. Experiments show that the proposed method is better than previous methods
Keywords :
VLSI; fuzzy logic; fuzzy set theory; neural chips; optimisation; Hopfield-type network; VLSI multi-chip design; VLSI system partitioning problem; expert knowledge; fuzzy logic rules; fuzzy-neuro approach; multi-objective optimization; neural networks; timing-driven system partitioning; Chaos; Circuits; Delay estimation; Fuzzy logic; Information science; Neural networks; Parallel architectures; Timing; Very large scale integration; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Fuzzy Systems, 1994. IEEE World Congress on Computational Intelligence., Proceedings of the Third IEEE Conference on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-1896-X
Type :
conf
DOI :
10.1109/FUZZY.1994.343628
Filename :
343628
Link To Document :
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