Title :
Assignment of storage values to sequential read-write memories
Author :
Gerez, Sabih H. ; Woutersen, Erwin G.
Author_Institution :
Dept. of Electr. Eng., Twente Univ., Enschede, Netherlands
Abstract :
Sequential read-write memories (SRWMs) are RAMs without an address decoder. A shift register is used instead to point at subsequent memory locations. SRWMs consume less power than RAMs of the same size. Algorithms are presented to check whether a set of storage values fits in a single SRWM and to automatically map storage values in as few SRWMs as possible. Benchmark results show that good assignments can be obtained in spite of the limited addressing capabilities
Keywords :
high level synthesis; logic CAD; performance evaluation; random-access storage; shift registers; storage allocation; RAM; SRWM; address decoder; addressing; benchmark results; high level synthesis; memory locations; power consumption; random access storage; sequential read-write memories; shift register; storage value assignment; Data visualization; Decoding; High level synthesis; Processor scheduling; Random access memory; Read-write memory; Scheduling algorithm; Shift registers; Storage automation; Writing;
Conference_Titel :
Design Automation Conference, 1996, with EURO-VHDL '96 and Exhibition, Proceedings EURO-DAC '96, European
Conference_Location :
Geneva
Print_ISBN :
0-8186-7573-X
DOI :
10.1109/EURDAC.1996.558221
