Title :
Behavior of chaotic network hardware system
Author :
Yamakawa, Takeshi ; Uchino, Eiji ; Miki, Tsutomu ; Kojima, Yasushi
Author_Institution :
Kyushu Inst. of Technol., Fukuoka, Japan
Abstract :
This paper describes the behavior of the chaotic unit employing the chaotic chip and that of the chaotic network. The experimental results were discussed with computer simulation results. The chip was developed for analyzing nonlinear dynamical network systems. It operates in analog voltage mode with switched capacitors and clock signal and generates discrete time series signal. It includes a 3-segment piecewise linear mapping function, the nonlinear parameters of which can be assigned externally
Keywords :
CMOS analogue integrated circuits; chaos; nonlinear dynamical systems; nonlinear network analysis; piecewise-linear techniques; signal generators; switched capacitor networks; time series; 3-segment piecewise linear mapping function; analog voltage mode; chaotic chip; chaotic network hardware system; clock signal; computer simulation; discrete time series signal generation; nonlinear dynamical network systems analysis; switched capacitors; Bifurcation; Chaos; Delay lines; Electronic mail; Hardware; Lattices; Nonlinear equations; Piecewise linear techniques; Resistors; Voltage;
Conference_Titel :
Fuzzy Systems, 1994. IEEE World Congress on Computational Intelligence., Proceedings of the Third IEEE Conference on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-1896-X
DOI :
10.1109/FUZZY.1994.343634
