A nonlinear optimization methodology for resistor matching in analog integrated circuits

In analog design flow, one of the most important issues is to achieve accurate resistor ratios during the layout phase, which is called resistor matching. In the literature, researchers have proposed several methodologies achieving high matching quality in a rectangular structure. However, under the fixed-outline constraint, layout designers will place normal blocks such as macros and intellectual properties (IPs) first and then place the resistors. But the remaining space for resistors is usually rectilinear rather than rectangular, which is not appropriate for achieving high matching quality. To overcome this problem, we propose a nonlinear optimization methodology for globally improving the matching quality. Our algorithm enhances the matching quality by deforming the rectilinear shape into centro symmetrical shape and simultaneously maintains the relative positions of each block which is important for reserving the designed electrical property in the input layout. Experimental result shows that the proposed algorithm is very promising.