• DocumentCode
    2272152
  • Title

    EXPLORER: an interactive floorplanner for design space exploration

  • Author

    Esbensen, H.

  • Author_Institution
    Avant Corp., Sunnyvale, CA
  • fYear
    1996
  • fDate
    16-20 Sep 1996
  • Firstpage
    356
  • Lastpage
    361
  • Abstract
    An interactive floor planner based on the genetic algorithm is presented. Layout area, aspect ratio, routing congestion and maximum path delay are optimized simultaneously. The design requirements are refined interactively as knowledge of the obtainable cost tradeoffs is gained and a set of feasible solutions representing alternative, good tradeoffs is generated. Experimental results illustrate the special features of the approach
  • Keywords
    circuit layout CAD; genetic algorithms; integrated circuit layout; interactive systems; EXPLORER; aspect ratio; design requirements; design space exploration; feasible solutions; genetic algorithm; integrated circuit design; interactive floor planner; interactive floorplanner; layout area; maximum path delay; obtainable cost tradeoffs; routing congestion; Algorithm design and analysis; Character generation; Costs; Delay; Genetic algorithms; Minimization methods; Pins; Routing; Space exploration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 1996, with EURO-VHDL '96 and Exhibition, Proceedings EURO-DAC '96, European
  • Conference_Location
    Geneva
  • Print_ISBN
    0-8186-7573-X
  • Type

    conf

  • DOI
    10.1109/EURDAC.1996.558229
  • Filename
    558229