A low-power and small-area all-digital spread-spectrum clock generator in 65nm CMOS technology

Author

Chung, Ching-Che ; Sheng, Duo ; Ho, Wei-Da

Author_Institution

Dept. of Comput. Sci. & Inf. Eng., Nat. Chung Cheng Univ., Chiayi, Taiwan

fYear

2012

fDate

23-25 April 2012

Firstpage

1

Lastpage

4

Abstract

In this paper, a low-power and small-area all-digital spread spectrum clock generator (ADSSCG) is presented. The proposed ADSSCG can provide a programmable spreading ratio. In order to maintain the frequency stability while performing triangular modulation, a fast frequency and phase relock mechanism is proposed to overcome the process, voltage, and temperature (PVT) variations. The proposed ADSSCG is implemented in a standard performance 65nm CMOS process, and the active area is 100μm × 100μm. The simulation results show that the electromagnetic interference (EMI) reduction is 22.6dB with 1.3% spreading ratio at 270MHz and 18.9dB with 0.45% spreading ratio at 162MHz. The power consumption is 229μW at 270MHz with 1.0V power supply. Besides, the proposed ADSSCG is implemented with standard cells, and thus it can be easily ported to different processes in a very short time. Therefore, the proposed ADSSCG is suitable for system-on-chip (SoC) applications.

Keywords

CMOS integrated circuits; circuit stability; clocks; electromagnetic interference; low-power electronics; ADSSCG; CMOS process; CMOS technology; EMI reduction; PVT variation; SoC application; electromagnetic interference; fast frequency; frequency 162 MHz; frequency 270 MHz; frequency stability; low-power all-digital spread-spectrum clock generator; phase relock mechanism; power 229 muW; power consumption; process-voltage-temperature variation; programmable spreading ratio; size 65 nm; small-area all-digital spread-spectrum clock generator; standard cell; system-on-chip; triangular modulation; voltage 1 V; Clocks; Electromagnetic interference; Frequency control; Frequency conversion; Frequency modulation; Generators;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design, Automation, and Test (VLSI-DAT), 2012 International Symposium on

Conference_Location

Hsinchu

ISSN

PENDING

Print_ISBN

978-1-4577-2080-2

Type

conf

DOI

10.1109/VLSI-DAT.2012.6212632

Filename

6212632