• DocumentCode
    2272568
  • Title

    Optimal design of two level inverters

  • Author

    Wei, Mo ; Chiang, Loh Poh ; Yi, Ding

  • Author_Institution
    Power Div., Nanyang Technol. Univ., Singapore, Singapore
  • fYear
    2010
  • fDate
    27-29 Oct. 2010
  • Firstpage
    705
  • Lastpage
    710
  • Abstract
    There are many proposed inverter design topologies, which exhibit certain advantages and disadvantages in various performance aspects. However there exist few quantitative techniques to optimally develop inverters to achieve different objectives such as size minimization, power loss minimization and reliability maximization. Without the relevant techniques, the selection and design of inverters are merely based on qualitative reasoning, which are often subjective to individual preferences. Aiming to address that issue, this paper proposes an optimal design method for two level inverters. The design objective is to achieve optimal performance of inverters by selecting appropriate size, power loss and reliability. The specified operation conditions such as ambient temperature, input voltage, output voltage and output power are considered in the design process. Five typical types of two level inverters, namely: conventional inverter, DC-DC boosted PWM inverter, Z-source inverter, Cuk-derived inverter and SEPIC-zeta-derived inverter are selected and analyzed by using the proposed methods.
  • Keywords
    DC-DC power convertors; PWM invertors; Cuk-derived inverter; DC-DC boosted PWM inverter; SEPIC-zeta-derived inverter; Z-source inverter; inverter design topologies; optimal design; power loss minimization; reliability maximization; two level inverters; inverter size; optimal design; power loss; reliability;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    IPEC, 2010 Conference Proceedings
  • Conference_Location
    Singapore
  • ISSN
    1947-1262
  • Print_ISBN
    978-1-4244-7399-1
  • Type

    conf

  • DOI
    10.1109/IPECON.2010.5697017
  • Filename
    5697017