DocumentCode :
2272579
Title :
An OCP-AHB bus wrapper with built-in ICE support for SOC integration
Author :
Wu, Cheng-Ta ; Huang, Feng-Xiang ; Kuo, Kuan-Fu ; Huang, Ing-Jer
Author_Institution :
Dept. of Comput. Sci. & Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
fYear :
2012
fDate :
23-25 April 2012
Firstpage :
1
Lastpage :
4
Abstract :
As the design of SoC is getting more and more complicated, the IPs (Intellectual Property) reuse ability increasing is the key issue to improve the time of the embedded systems development and integration. However, the different SoC design environment will affect the IPs reuse ability, such as in different system bus. In this paper we have implemented a standard OCP-AHB bus wrapper. By this wrapper, the IP with OCP interface can connect to AMBA 2.0 AHB bus quickly, and IP designer can focus on the development of IP functionalities without considering the data transaction in different interconnects. This will reduce the IPs development time, and increase the reuse ability. Thus the system integration and verification can be accelerated. Furthermore, we added the built-in ICE architecture to make the SoC verification more flexible and quickly.
Keywords :
embedded systems; industrial property; integrated circuit design; integrated circuit interconnections; system-on-chip; AMBA 2.0 AHB; IP functionalities; IP reuse ability; SoC integration; built-in ICE support; data transaction; development time; embedded systems development; intellectual property; standard OCP-AHB bus wrapper; system on chip design environment; system verification; Acceleration; IP networks; Ice; Organizations; Protocols; Registers; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, Automation, and Test (VLSI-DAT), 2012 International Symposium on
Conference_Location :
Hsinchu
ISSN :
PENDING
Print_ISBN :
978-1-4577-2080-2
Type :
conf
DOI :
10.1109/VLSI-DAT.2012.6212654
Filename :
6212654
Link To Document :
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