A digital parallel VLSI architecture for fuzzy data base mining

Author

Bellettini, A. ; Ferrari, A. ; Guerrieri, R. ; Baccarani, G.

Author_Institution

Dept. of Electron., Bologna Univ., Italy

fYear

1994

fDate

26-29 Jun 1994

Firstpage

284

Abstract

This paper describes the design and implementation of an application-specific digital architecture aimed at performing the mining of fuzzy database. The system described is an array-processor architecture in which the database is split among several units that at the same time apply the same operations to different data stored in local memories. A chip set implementing the architecture has been built using a semicustom approach and it is fully functional. The sustained memory bandwidth of a system featuring 8 units is 2560 Mbit/sec and it provides a speed-up of 500 times over the software algorithm running on a SUN Sparc2 workstation

Keywords

CMOS digital integrated circuits; VLSI; application specific integrated circuits; database management systems; fuzzy logic; information retrieval; microprocessor chips; parallel architectures; search problems; sorting; 2560 Mbit/s; ASIC; SUN Sparc2 workstation; application-specific digital architecture; arithmetic unit; array-processor architecture; digital parallel VLSI architecture; fuzzy database; local memories; memory bandwidth; sorting unit; Bandwidth; Central Processing Unit; Computer architecture; Data mining; Electronic mail; Software algorithms; Software performance; Sun; Very large scale integration; Workstations;

fLanguage

English

Publisher

ieee

Conference_Titel

Fuzzy Systems, 1994. IEEE World Congress on Computational Intelligence., Proceedings of the Third IEEE Conference on

Conference_Location

Orlando, FL

Print_ISBN

0-7803-1896-X

Type

conf

DOI

10.1109/FUZZY.1994.343675

Filename

343675