FDTD modeling of switching noise in multi-layered digital circuits with CMOS inverters and passive lumped elements

Author

Fujii, M. ; Murase, H. ; Kobayashi, S.

Author_Institution

Sumitomo Metal Ind. Ltd., Amagasaki, Japan

Volume

3

fYear

1996

fDate

17-21 June 1996

Firstpage

1787

Abstract

Multi-layered digital circuits such as LSI packages, has been analyzed by using a Finite-Difference Time-Domain (FDTD) method. Linear lumped elements, resistors and capacitors, and nonlinear lumped elements, CMOS drivers, are included in the analyses. Various noises as well as digital pulse propagation in multi-layered circuits are effectively analyzed by this technique.

Keywords

CMOS digital integrated circuits; CMOS logic circuits; circuit analysis computing; equivalent circuits; finite difference time-domain analysis; integrated circuit noise; integrated circuit packaging; large scale integration; logic gates; lumped parameter networks; multichip modules; switching; CMOS drivers; CMOS inverters; FDTD modeling; LSI packages; digital pulse propagation; finite-difference time-domain method; linear lumped elements; multilayered digital circuits; nonlinear lumped elements; passive lumped elements; switching noise; Capacitors; Circuit noise; Digital circuits; Finite difference methods; Large scale integration; Packaging; Resistors; Semiconductor device modeling; Switching circuits; Time domain analysis;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Symposium Digest, 1996., IEEE MTT-S International

Conference_Location

San Francisco, CA, USA

ISSN

0149-645X

Print_ISBN

0-7803-3246-6

Type

conf

DOI

10.1109/MWSYM.1996.512290

Filename

512290