An accurate equivalent circuit model of flip chip interconnects

In this paper, a general and accurate circuit model of the flip chip interconnect has been investigated and presented. In this circuit model, statistical analysis is used to compute the value of the circuit elements. Also, losses in the flip chip package are represented by a simple function vs frequency. These losses include substrate loss of the chip and the mother board due to excitation of surface wave and radiation loss due to the bump. Good agreement has been obtained between the s-parameters of the FD-TD model and the equivalent circuit model over a wide frequency band of up to 50 GHz. This equivalent circuit can be used in commercial circuit simulators to predict MMIC performance including the package.