Dynamic testing for radiation induced failures in a standard CMOS submicron technology pixel front-end

Author

Venuto, D. De ; Corsi, F. ; Ohletz, M.J.

Author_Institution

Dipt. di Elettrotecnica ed Elettronica, Politecnico di Bari & Sez. INFN, Italy

fYear

1999

fDate

1999

Firstpage

346

Lastpage

352

Abstract

A testing method for the detection of performance degradation induced by high-dose irradiation in high-energy experiments has been developed. This method was successfully applied for testing the analogue CMOS front-end of a silicon pixel detector. The major effects of radiation induced faults have been investigated with respect to the special layout used for the nMOS transistors

Keywords

CMOS analogue integrated circuits; failure analysis; integrated circuit layout; integrated circuit reliability; integrated circuit testing; radiation hardening (electronics); silicon radiation detectors; Si; analogue CMOS front-end; dynamic testing; high-dose irradiation; high-energy experiments; layout; nMOS transistors; performance degradation; radiation induced failures; radiation induced faults; silicon pixel detector; standard CMOS submicron technology pixel front-end; testing method; CMOS technology; Circuit faults; Circuit testing; Degradation; Detectors; Electronic circuits; Isolation technology; Large Hadron Collider; Microelectronics; Pulse circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Radiation and Its Effects on Components and Systems, 1999. RADECS 99. 1999 Fifth European Conference on

Conference_Location

Fontevraud

Print_ISBN

0-7803-5726-4

Type

conf

DOI

10.1109/RADECS.1999.858606

Filename

858606