DocumentCode :
2274562
Title :
A highly scalable system utilizing up to 128 PA-RISC processors
Author :
Brewer, T.
Author_Institution :
Convex Comput. Corp., Richardson, TX, USA
fYear :
1995
fDate :
5-9 March 1995
Firstpage :
133
Lastpage :
140
Abstract :
A highly scalable system implementing Convex´s Exemplar Architecture has been designed. The system allows up to 128 Hewlett-Packard processors to efficiently cooperate together. All processors may be used together to substantially decrease the time-to-solution for large applications, or the processors may be used in smaller subsets in a time-sharing parallel environment. The system has many features which enhance the parallel usability of the system. These features include globally shared memory, interconnect caches, memory massed semaphores, and hardware messaging support.
Keywords :
parallel processing; reduced instruction set computing; 128 Hewlett-Packard processors; 128 PA-RISC processors; Convex´s Exemplar Architecture; globally shared memory; hardware messaging support; highly scalable system; interconnect caches; memory massed semaphores; parallel usability; time-sharing parallel environment; time-to-solution; Application software; Application specific integrated circuits; Computer architecture; Costs; Hardware; High performance computing; Job design; Parallel processing; Reduced instruction set computing; Usability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Compcon '95.'Technologies for the Information Superhighway', Digest of Papers.
Conference_Location :
San Francisco, CA, USA
ISSN :
1063-6390
Print_ISBN :
0-8186-7029-0
Type :
conf
DOI :
10.1109/CMPCON.1995.512376
Filename :
512376
Link To Document :
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