DocumentCode :
2274881
Title :
Dynamic Critical-Path based on Fit Degree scheduling for reconfigurable multi-FPGAs
Author :
Xiao, Yan ; Duan, Zhenhua
Author_Institution :
Inst. of Comput. Theor. & Technol., Xidian Univ., Xi´´an
fYear :
2008
fDate :
23-27 June 2008
Firstpage :
27
Lastpage :
32
Abstract :
Reconfigurable computing is becoming increasingly attractive for many applications. In this paper, an efficient algorithm named dynamic critical-path based on fit degree (DCPFD) is formalized and used to schedule related hardware tasks in terms of task graphs for reconfigurable FPGAs with respect to the constraints: precedence, deadline and resource. The dynamic critical-path (DCP) dynamically evaluates critical-paths of a task graph and determines the most critical task in order to shorten the schedule length. The fit degree (FD) is calculated for the scheduled task w.r.t each FPGA, and used to check which FPGA has enough space and where in it, to place the task. The Pre-fetching technique is also employed to reduce the FPGA configuration overhead.
Keywords :
field programmable gate arrays; processor scheduling; reconfigurable architectures; dynamic critical-path; fit degree scheduling; prefetching technique; reconfigurable computing; reconfigurable multiFPGA; task graphs; Computer architecture; Data flow computing; Digital signal processing; Dynamic scheduling; Fabrics; Field programmable gate arrays; Hardware; Processor scheduling; Signal processing algorithms; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application of Concurrency to System Design, 2008. ACSD 2008. 8th International Conference on
Conference_Location :
Xian
ISSN :
1550-4808
Print_ISBN :
978-1-4244-1838-1
Electronic_ISBN :
1550-4808
Type :
conf
DOI :
10.1109/ACSD.2008.4574591
Filename :
4574591
Link To Document :
بازگشت