DocumentCode
2275058
Title
Simultaneous Depth and Area Minimization in LUT-based FPGA Mapping
Author
Cong, Jason ; Hwang, Yean-Yow
Author_Institution
University of California, Los Angeles, CA
fYear
1995
fDate
1995
Firstpage
68
Lastpage
74
Abstract
In this paper, we present an improvement of the FlwoMap algorithm, named CutMap, which combines depth and area minimization during the mapping process by computing min-cost min-height K-feasible cuts for critical nodes for depth minimization and computing min-cost K-feasible cuts for non-critical nodes for area minimization. CutMap guarantees depth-optimal mapping solutions in polynomial time as the FlowMap algorithm but uses considerably fewer K-LUTs. We have implemented CutMap and tested it on the MCNC logic synthesis benchmarks. For depth-optimal mapping solutions, CutMap uses 15% fewer K-LUTs than FlowMap. We also tested CutMap followed by the depth relaxation routines in FlowMap_r algorithm, which achieves area minimization by depth relaxation. CutMap followed FlowMap_r performs better than FlowMap_r.
Keywords
Benchmark testing; Circuit testing; Computer science; Delay; Field programmable gate arrays; Logic testing; Minimization methods; Polynomials; Simultaneous localization and mapping; Table lookup;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Gate Arrays, 1995. FPGA '95. Proceedings of the Third International ACM Symposium on
Print_ISBN
0-7695-2550-4
Type
conf
DOI
10.1109/FPGA.1995.241947
Filename
1377263
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