DocumentCode
2275094
Title
Symbolic model checking of hierarchical UML state machines
Author
Dubrovin, Jori ; Junttila, Tommi
Author_Institution
Dept. of Inf. & Comput. Sci., Helsinki Univ. of Technol. (TKK), Helsinki
fYear
2008
fDate
23-27 June 2008
Firstpage
108
Lastpage
117
Abstract
A compact symbolic encoding is described for the transition relation of systems modeled with asynchronously executing, hierarchical UML state machines that communicate through message passing and attribute access. This enables the analysis of such systems by symbolic model checking techniques, such as BDD-based model checking and SAT-based bounded model checking. Message reception, completion events, and run-to-completion steps are handled in accordance with the UML specification. The size of the encoding for state machine control logic is linear in the size of the state machine even in the presence of composite states, orthogonal regions, and message deferring. The encoding is implemented for the NuSMV model checker, and preliminary experimental results are presented.
Keywords
Unified Modeling Language; finite state machines; formal verification; message passing; BDD-based model checking; NuSMV model checker; SAT-based bounded model checking; compact symbolic encoding; hierarchical UML state machines; message passing; state machine control logic; symbolic model checking; Boolean functions; Computer science; Data structures; Encoding; Hardware; Logic; Machine control; Message passing; Model driven engineering; Unified modeling language;
fLanguage
English
Publisher
ieee
Conference_Titel
Application of Concurrency to System Design, 2008. ACSD 2008. 8th International Conference on
Conference_Location
Xian
ISSN
1550-4808
Print_ISBN
978-1-4244-1838-1
Electronic_ISBN
1550-4808
Type
conf
DOI
10.1109/ACSD.2008.4574602
Filename
4574602
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