DocumentCode
2275305
Title
An admission control system for QoS provision on a best-effort GALS interconnect
Author
Yang, Shufan ; Furber, Steve B. ; Shi, Yebin ; Plana, Luis A.
Author_Institution
Sch. of Comput. Sci., Univ. of Manchester, Oxford
fYear
2008
fDate
23-27 June 2008
Firstpage
200
Lastpage
207
Abstract
A central admission control mechanism is introduced in order to provide efficient Quality-of-Service (QoS) support for different types of application over a best-effort Globally-Asynchronous Locally-Synchronous (GALS) interconnect fabric. The mechanism is applied at the ingress edges of the fabric using tokens to allocate dynamic network resources and prevent network saturation. Analysis and simulation results are presented to show the effectiveness of the method. The control provides service guarantees on the network while using a modest physical area because of the simplicity of the control logic. This is a cost-effective way to provide QoS in packet-switched interconnect because of its independence from other network components.
Keywords
asynchronous circuits; integrated circuit design; integrated circuit interconnections; logic design; quality of service; resource allocation; system-on-chip; GALS; QoS; admission control system; control logic; dynamic network resource allocation; globally-asynchronous locally-synchronous interconnect fabric; network saturation; packet-switched interconnect; quality-of-service; system-on-chip design; Admission control; Application software; Clocks; Computer science; Delay; Fabrics; Job shop scheduling; Protocols; Quality of service; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Application of Concurrency to System Design, 2008. ACSD 2008. 8th International Conference on
Conference_Location
Xian
ISSN
1550-4808
Print_ISBN
978-1-4244-1838-1
Electronic_ISBN
1550-4808
Type
conf
DOI
10.1109/ACSD.2008.4574612
Filename
4574612
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