Title :
Verification of the UltraSPARC microprocessor
Author :
Mehta, S. ; Ahmed, S. ; Al-Ashari, S. ; Chen, D. ; Dev, C. ; Cokmez, S. ; Desai, P. ; Eltejaein, R. ; Fu, P. ; Gee, J. ; Granvold, T. ; Iyer, A. ; Lin, K. ; Maturana, G. ; McConn, D. ; Mohammed, H. ; Mostoufi, J. ; Moudgal, A. ; Nori, S. ; Parveen, N. ; P
Author_Institution :
SPARC Technol Bus., Sun Microsyst. Inc., Mountain View, CA, USA
Abstract :
The overall verification approach used in the design and development of the full custom 64 bit UltraSPARC microprocessor is described. A balanced hierarchical approach is critical in validating a design with this level of complexity. The tools, developed internally and externally, which aided the verification effort are also described. The environment is flexible enough to support various revisions of major tools. The method developed could easily be applied to derivative and next generation microprocessors.
Keywords :
computational complexity; microprocessor chips; 64 bit; UltraSPARC microprocessor; balanced hierarchical approach; complexity; full custom 64 bit; overall verification approach; Acceleration; Graphics; Microprocessors; Out of order; Pipelines; Production; Reduced instruction set computing; Sun; Testing; Transistors;
Conference_Titel :
Compcon '95.'Technologies for the Information Superhighway', Digest of Papers.
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-8186-7029-0
DOI :
10.1109/CMPCON.1995.512422
