Identifying systematic critical features using silicon diagnosis data

A production worthy methodology has been outlined that uses layout aware scan diagnosis data to validate whether certain topologies are design-process induced defects. The methodology uses pattern matching technology to generate a set of critical feature hypotheses and uses diagnosis-driven yield analysis to validate or refute the hypotheses. The methodology is demonstrated in a 28nm GLOBALFOUNDRIES yield ramp to uniquely identify systematic critical features in silicon and provide a best description of the surrounding topology which induces the defect, along with quantifying the yield impact.