DocumentCode
2275676
Title
Entropy, Counting, and Programmable Interconnect
Author
DeHon, André
Author_Institution
MIT Artificial Intelligence Laboratory, Cambridge, MA
fYear
1996
fDate
1996
Firstpage
73
Lastpage
79
Abstract
Conventional reconfigurable components have substantially more interconnect configuration bits than they strictly need. Using counting arguments we can establish loose bounds on the number of programmable bits actually required to describe an interconnect. We apply these bounds in crude form to some existing devices, demonstrating the large redundancy in their programmable bit streams. In this process we review and demonstrate basic counting techniques for identifying the information required to specify an interconnect. We examine several common interconnect building blocks and look at how efficiently they use the information present in their programming bits. We also discuss the impact of this redundancy on important device aspects such as area, routing, and reconfiguration time.
Keywords
Artificial intelligence; Bandwidth; Entropy; Field programmable gate arrays; Laboratories; Random access memory; Routing; Switches; Table lookup; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Gate Arrays, 1996. FPGA '96. Proceedings of the 1996 ACM Fourth International Symposium on
Print_ISBN
0-7695-2576-8
Type
conf
DOI
10.1109/FPGA.1996.242346
Filename
1377289
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